| Presentation | 1998/9/22 Design of Completion Prediction Adder with Shift Operation and Its Application to Microprocessor Ruotong Zheng, Kunihiro Asada, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this report, an adder with prediction completion is proposed. It takes advantage of the maximum valid carry propagation length calculated from two operands to predict the operation time of the adder. Completion signal is created to indicate accomplishment of the addition. Without being interfered by the completion detection mechanism, the speed of addition circuit of the adder is maintained. Performance evaluation by simulation shows that it holds 20%-66% higher operation speed than that of conventional synchronous adders in average case. In addition, its application to microprocessor is also discussed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | adder / completion prediction / completion detection / asynchronous / microprocessor |
| Paper # | VLD98-51,ICD98-154,FTS98-78 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 1998/9/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of Completion Prediction Adder with Shift Operation and Its Application to Microprocessor |
| Sub Title (in English) | |
| Keyword(1) | adder |
| Keyword(2) | completion prediction |
| Keyword(3) | completion detection |
| Keyword(4) | asynchronous |
| Keyword(5) | microprocessor |
| 1st Author's Name | Ruotong Zheng |
| 1st Author's Affiliation | VLSI Design Education Center, University of Tokyo() |
| 2nd Author's Name | Kunihiro Asada |
| 2nd Author's Affiliation | VLSI Design Education Center, University of Tokyo |
| Date | 1998/9/22 |
| Paper # | VLD98-51,ICD98-154,FTS98-78 |
| Volume (vol) | vol.98 |
| Number (no) | 287 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |