| Presentation | 1998/7/31 A Small Size Realization of a VLSI Self-Organizing Network Based on the Error Analysis Junya Ohkubo, Yoshikazu Miyanaga, Koji Tochinai, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this report, a VLSI design of a Self-Organizing system for data clustering which is a neural network vector classifier is described. The dimension of input vectors m and the number of nodes of the system n are programmable so that the system has high generality. Although the circuit size of this kind of system tends to become larger, it is considerably reduced without sacrificing processing speed by two methods : low bit realization using an error analysis and adoption of a pipeline processing. According to the result of design using a CPLD, the scale of the system on 1-chip CPLD is m×n≤512. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Self-Organizing Clustering / Error Analysis / Pipeline Processing |
| Paper # | VLD98-32 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 1998/7/31(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Small Size Realization of a VLSI Self-Organizing Network Based on the Error Analysis |
| Sub Title (in English) | |
| Keyword(1) | Self-Organizing Clustering |
| Keyword(2) | Error Analysis |
| Keyword(3) | Pipeline Processing |
| 1st Author's Name | Junya Ohkubo |
| 1st Author's Affiliation | Graduate School of Engineering, Hokkaido University() |
| 2nd Author's Name | Yoshikazu Miyanaga |
| 2nd Author's Affiliation | Graduate School of Engineering, Hokkaido University |
| 3rd Author's Name | Koji Tochinai |
| 3rd Author's Affiliation | Graduate School of Engineering, Hokkaido University |
| Date | 1998/7/31 |
| Paper # | VLD98-32 |
| Volume (vol) | vol.98 |
| Number (no) | 232 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |