| Presentation | 1998/12/10 A Realization of Devices Simulation Engine Eisaku TOMITA, Toshio YAMAMOTO, Yukihiro IGUCHI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A high-speed and low-cost device simulation engine is proposed together with the investigation for its structure and realization. The proposal is based on the employment of FPGAs which are used for the calculations of the unknown variables of the discretized device equations. The SRAMs in the FPGAs are partly used for the memories, thus resulting in the cut down of the number of components. The performance of simulation engine is estimated by a static timing analyzer and timing simulator. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Device simulation / Simulation Engine / FPGA |
| Paper # | VLD98-108,CPSY98-128 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 1998/12/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Realization of Devices Simulation Engine |
| Sub Title (in English) | |
| Keyword(1) | Device simulation |
| Keyword(2) | Simulation Engine |
| Keyword(3) | FPGA |
| 1st Author's Name | Eisaku TOMITA |
| 1st Author's Affiliation | Dept. of Computer Science Meiji University() |
| 2nd Author's Name | Toshio YAMAMOTO |
| 2nd Author's Affiliation | Dept. of Computer Science Meiji University |
| 3rd Author's Name | Yukihiro IGUCHI |
| 3rd Author's Affiliation | Dept. of Computer Science Meiji University |
| Date | 1998/12/10 |
| Paper # | VLD98-108,CPSY98-128 |
| Volume (vol) | vol.98 |
| Number (no) | 446 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |