Presentation 1998/12/10
Pattern Recognition LSI's Designed by Direct Data Implementation Technique Using FPGA's
Moritoshi Yasunaga, Tomochika Takami,
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Abstract(in English) We proposed a design methodology to implement case data directly onto FPGA chips. Case data (pattern data) are converted into truth tables, and the tables are evolved to match unknown pattern data by using genetic algorithm. The evolved truth tables are simply implemented onto FPGA chips. By using the current high density FPGA chips, specialized pattern recognition chips for individual practical tasks can be rapidly developed at user-sites. We applied this methodology to develop an English pronunciation reasoning chip. The chip was designed with 139K gates and its prototype showed a reasoning speed of 500 ns/phoneme and a reasoning accuracy rate of 71.5%.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) FPGA / Truth table / Pattern recognition / Case data / Genetic Algorithm / Phoneme
Paper # VLD98-105,CPSY98-125
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Committee VLD
Conference Date 1998/12/10(1days)
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Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Pattern Recognition LSI's Designed by Direct Data Implementation Technique Using FPGA's
Sub Title (in English)
Keyword(1) FPGA
Keyword(2) Truth table
Keyword(3) Pattern recognition
Keyword(4) Case data
Keyword(5) Genetic Algorithm
Keyword(6) Phoneme
1st Author's Name Moritoshi Yasunaga
1st Author's Affiliation Istitute of Information Sciences and Electronics University of Tsukuba()
2nd Author's Name Tomochika Takami
2nd Author's Affiliation Istitute of Information Sciences and Electronics University of Tsukuba
Date 1998/12/10
Paper # VLD98-105,CPSY98-125
Volume (vol) vol.98
Number (no) 446
Page pp.pp.-
#Pages 7
Date of Issue