Presentation 1998/12/10
Solving Satisfiability Problems using Reconfigurable Hardware
Takayuki Suyama, Makoto Yokoo, Akira Nagoya,
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Abstract(in English) This paper presents a report on an approach for solving satisfiability problems (SAT) using Reconfigurable Hardware. Recently, due to advances in Reconfigurable Hardware such as FPGAs, users can now create their own reconfigurable logic circuits. This technology has enabled users to rapidly create logic circuits specialized for solving individual problem instances. Satisfiabitily problems were chosen because they make up an important subclass of NP-hard problems. We have developed a neew algorithm which is suitable for hardware and can reduce the search tree size. We report evaluation results and implementation status.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) satisfiability problems / Reconfigurable Hardware / logic synthesis / algorithm
Paper # VLD98-103,CPSY98-123
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Committee VLD
Conference Date 1998/12/10(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Solving Satisfiability Problems using Reconfigurable Hardware
Sub Title (in English)
Keyword(1) satisfiability problems
Keyword(2) Reconfigurable Hardware
Keyword(3) logic synthesis
Keyword(4) algorithm
1st Author's Name Takayuki Suyama
1st Author's Affiliation NTT Communication Science Laboratories()
2nd Author's Name Makoto Yokoo
2nd Author's Affiliation NTT Communication Science Laboratories
3rd Author's Name Akira Nagoya
3rd Author's Affiliation NTT Communication Science Laboratories
Date 1998/12/10
Paper # VLD98-103,CPSY98-123
Volume (vol) vol.98
Number (no) 446
Page pp.pp.-
#Pages 8
Date of Issue