| Presentation | 1998/12/10 Making and Evaluation of the Compiler for WASMII, a Virtual hardware system A. Takayama, K. Iwai, Y. Shibata, H. Miyazaki, K. Higure, X-P. Ling, H. Amano, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | WASMII is a reconfigurable system with the data driven control which executes programs written in dataflow graphs. In WASMII, a target dataflow graph is divided into some subgraphs and executed on a programmable device called MPLD which is an extended FPGA. By replacing the configuration data on the MPLD, large scale programs which exceed the limit of hardware resources can be efficiently executed. As a software environment of WASMII, a compiler which translates a program written by a user in a high-level language into a corresponding dataflow graph and its HDL description is required. In this paper, we show the design and implementation of the compiler for WASMII which generates the VHDL description from an input program, and introduce It/t method, which is a deadlock free graph-partitioning algo-rithm. Compilation and execution results of a test program on a reconfigurable tested called FLEMING are also shown. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Virtual hardware / Data driven control / Reconfigurable system / Hardware Description Language / FPGA / Compiler |
| Paper # | VLD98-100,CPST98-120 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 1998/12/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Making and Evaluation of the Compiler for WASMII, a Virtual hardware system |
| Sub Title (in English) | |
| Keyword(1) | Virtual hardware |
| Keyword(2) | Data driven control |
| Keyword(3) | Reconfigurable system |
| Keyword(4) | Hardware Description Language |
| Keyword(5) | FPGA |
| Keyword(6) | Compiler |
| 1st Author's Name | A. Takayama |
| 1st Author's Affiliation | Dept. of Computer Science, Keio University() |
| 2nd Author's Name | K. Iwai |
| 2nd Author's Affiliation | Dept. of Computer Science, Keio University |
| 3rd Author's Name | Y. Shibata |
| 3rd Author's Affiliation | Dept. of Computer Science, Keio University |
| 4th Author's Name | H. Miyazaki |
| 4th Author's Affiliation | Dept. of Computer Science, Keio University |
| 5th Author's Name | K. Higure |
| 5th Author's Affiliation | Hitachi, Ltd. Software Development Center |
| 6th Author's Name | X-P. Ling |
| 6th Author's Affiliation | Dept. of Information and Computer Science, Kanagawa |
| 7th Author's Name | H. Amano |
| 7th Author's Affiliation | Dept. of Computer Science, Keio University |
| Date | 1998/12/10 |
| Paper # | VLD98-100,CPST98-120 |
| Volume (vol) | vol.98 |
| Number (no) | 446 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |