| Presentation | 1995/10/20 Digital Signal Processing on hardware rollback system Makoto Ishii, Takashi Matsubara, Yoshiaki Koga, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The microprocessor Gmicro/100 for fault tolerant systems has been developed for highly-reliable system equipped with built-in coincidence checker, hardware rollback operation and recovery functions. For a real time fault-tolerant system, a duplex system is composed by Gmicro/100FTS and Gmicro/100 for general use. We show that the check point setting up and the rollback operations affect to digital signal processing and also show that a FIFO buffer is effective to reduce distortions in digital signal processing. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | rollback operation / digital signal processing |
| Paper # | VLD95-98,FTS95-60 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 1995/10/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Digital Signal Processing on hardware rollback system |
| Sub Title (in English) | |
| Keyword(1) | rollback operation |
| Keyword(2) | digital signal processing |
| 1st Author's Name | Makoto Ishii |
| 1st Author's Affiliation | Department of Computer Science, National Defense Academy() |
| 2nd Author's Name | Takashi Matsubara |
| 2nd Author's Affiliation | Department of Computer Science, National Defense Academy |
| 3rd Author's Name | Yoshiaki Koga |
| 3rd Author's Affiliation | Department of Computer Science, National Defense Academy |
| Date | 1995/10/20 |
| Paper # | VLD95-98,FTS95-60 |
| Volume (vol) | vol.95 |
| Number (no) | 307 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |