Presentation | 1995/10/20 A Parallel Transduction Method using Parallel BDD Manipulation Futoshi Matsumoto, Shinji Kimura, Katsumasa Watanabe, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We propose a parallel transduction method based on parallel BDD manipulation for shared memory multi-processor systems. The transduction method is a kind of logic optimization method using the transformation and the reduction of logic circuits. In these operations, permissible functions are used. We consider the parallel algorithm to compute the permissible functions of logic gates, and parallel algorithms to transform and reduce the circuit. We focus on transduction methods based on the connect, able/disconnectable method. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Transduction Method / Permissible Function / BDD / Parallel BDD Manipulation / Parallel Transduction / Logic Synthesis |
Paper # | VLD95-89,FTS95-51 |
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Committee | VLD |
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Conference Date | 1995/10/20(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | VLSI Design Technologies (VLD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Parallel Transduction Method using Parallel BDD Manipulation |
Sub Title (in English) | |
Keyword(1) | Transduction Method |
Keyword(2) | Permissible Function |
Keyword(3) | BDD |
Keyword(4) | Parallel BDD Manipulation |
Keyword(5) | Parallel Transduction |
Keyword(6) | Logic Synthesis |
1st Author's Name | Futoshi Matsumoto |
1st Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology() |
2nd Author's Name | Shinji Kimura |
2nd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
3rd Author's Name | Katsumasa Watanabe |
3rd Author's Affiliation | Graduate School of Information Science, Nara Institute of Science and Technology |
Date | 1995/10/20 |
Paper # | VLD95-89,FTS95-51 |
Volume (vol) | vol.95 |
Number (no) | 307 |
Page | pp.pp.- |
#Pages | 8 |
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