Presentation	1995/10/19 AC YIELD PREDICTION Kanji Hirabayashi,
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Abstract(in English)	Assuming That the distribution of path delays introduced by variations in the manufacturing process is a combination of exponential functions, AC yield is calculated for synchronous circuits. Each exponential function corresponds to variations in process parameters, foreign material caused shallow diffusion, resistive metal open, and so on. The distribution of designed path delays is assumed to be gaussian. Only below a certain value of the clock frequency of AC test, the yield is shown to be higher for smaller variances of the distribution. For higher frequencies the result is inverse.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	AC test / delay defect / yield analysis / synchronous circuits / exponential distribution
Paper #	VLD95-87,FTS95-49
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Conference Information
Committee	VLD
Conference Date	1995/10/19(1days)
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Paper Information
Registration To	VLSI Design Technologies (VLD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	AC YIELD PREDICTION
Sub Title (in English)
Keyword(1)	AC test
Keyword(2)	delay defect
Keyword(3)	yield analysis
Keyword(4)	synchronous circuits
Keyword(5)	exponential distribution
1st Author's Name	Kanji Hirabayashi
1st Author's Affiliation	Toshiba R & D Center ULSI Laboratory()
Date	1995/10/19
Paper #	VLD95-87,FTS95-49
Volume (vol)	vol.95
Number (no)	306
Page	pp.pp.-
#Pages	7
Date of Issue