Presentation 1995/10/19
A Study for Fault Diagnosis in Sequential Circuits using Sensitizing Sequence Pairs
Nobuhiro Yanagida, Hiroshi Takahashi, Yuzo Takamatsu,
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Abstract(in English) This paper presents a new approach to multiple fault diagnosis in sequential circuits by using input-sequence pairs having sensitizing input pairs. We call such the input-sequence pair the sensitizing sequence pair in this paper. First, we generate sensitizing sequence pairs from a test sequence detecting a single stack-at fault in a sequential circuit and use a set of sensitizing sequence pairs to diagnose multiple faults in the sequential circuit. Next, we describe a method for diagnosing multiple faults in sequential circuits partitioned into sub circuits. This represents an extension of our previous work dealing with combinational circuits. From a relation between a sensitizing path generated by a sensitizing sequence pair and a subcircuit, this method deduces the suspected faults for the subcircuits, one by one, based on the responses observed at primary outputs. Finally, we study the efficiency of the method from experimental results for benchmark circuits.
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Keyword(in English) sequential circuit / fault diagnosis / sensitizing sequence pair / subcircuit
Paper # VLD95-80,FTS95-42
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Committee VLD
Conference Date 1995/10/19(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Study for Fault Diagnosis in Sequential Circuits using Sensitizing Sequence Pairs
Sub Title (in English)
Keyword(1) sequential circuit
Keyword(2) fault diagnosis
Keyword(3) sensitizing sequence pair
Keyword(4) subcircuit
1st Author's Name Nobuhiro Yanagida
1st Author's Affiliation Department of Computer Science, Faculty of Engineering Ehime University()
2nd Author's Name Hiroshi Takahashi
2nd Author's Affiliation Department of Computer Science, Faculty of Engineering Ehime University
3rd Author's Name Yuzo Takamatsu
3rd Author's Affiliation Department of Computer Science, Faculty of Engineering Ehime University
Date 1995/10/19
Paper # VLD95-80,FTS95-42
Volume (vol) vol.95
Number (no) 306
Page pp.pp.-
#Pages 8
Date of Issue