Presentation 1996/3/8
Logic/Circuit Mixed-Mode Simulation incorporating Power Supply Voltage Fluctuation
Mikako Miyama, Goichi Yokomizo, Masato Iwabuchi, Masami Kinoshita,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A mixed-mode simulator is described that can simulate voltage fluctuations in the power supply network. Current flow due to logic events is taken into account in order to predict the voltage fluctuations. The difference between the maximum voltage fluctuations calculated by the proposed mixed-mode simulation and these calculated by conventional circuit simulation are within 20%, and we demonstrated the feasibility of the proposed simulation by simulating an entire MOS memory chip (36,000 transistors) in 75 minutes on an HP9000/735.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Voltage fluctuation / Source current / Mixed-mode simulation / Logic simulation / Circuit simulation
Paper # VLD95-149,ICD95-249
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Conference Information
Committee VLD
Conference Date 1996/3/8(1days)
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Paper Information
Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Logic/Circuit Mixed-Mode Simulation incorporating Power Supply Voltage Fluctuation
Sub Title (in English)
Keyword(1) Voltage fluctuation
Keyword(2) Source current
Keyword(3) Mixed-mode simulation
Keyword(4) Logic simulation
Keyword(5) Circuit simulation
1st Author's Name Mikako Miyama
1st Author's Affiliation Hitachi Ltd()
2nd Author's Name Goichi Yokomizo
2nd Author's Affiliation Hitachi Ltd
3rd Author's Name Masato Iwabuchi
3rd Author's Affiliation Hitachi Ltd
4th Author's Name Masami Kinoshita
4th Author's Affiliation Hitachi Ltd
Date 1996/3/8
Paper # VLD95-149,ICD95-249
Volume (vol) vol.95
Number (no) 562
Page pp.pp.-
#Pages 8
Date of Issue