Presentation | 1995/9/14 Two-Dimensional DC and Transient Simulation of GaAs MESFET Considering Surface-State Effect T. Yamada, K. Satoh, K. Horio, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Effects of surface states on I-V curves and turn-on characteristics in GaAs MESFETs are studied by 2-D simulation. These characteristics are essentially determined by deep-acceptor-like state. Depending on whether it acts as an electron trap or a hole trap, the turn-on characteristics change drastically. Physical mechanism of the slow transients due to surface states is discussed in detail, and a way to eliminate the gate-lag is also described. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | GaAs MESFET / surface state / device simulation / gate lag / hole trap |
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Committee | VLD |
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Conference Date | 1995/9/14(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Registration To | VLSI Design Technologies (VLD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Two-Dimensional DC and Transient Simulation of GaAs MESFET Considering Surface-State Effect |
Sub Title (in English) | |
Keyword(1) | GaAs MESFET |
Keyword(2) | surface state |
Keyword(3) | device simulation |
Keyword(4) | gate lag |
Keyword(5) | hole trap |
1st Author's Name | T. Yamada |
1st Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology() |
2nd Author's Name | K. Satoh |
2nd Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
3rd Author's Name | K. Horio |
3rd Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
Date | 1995/9/14 |
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Volume (vol) | vol.95 |
Number (no) | 231 |
Page | pp.pp.- |
#Pages | 6 |
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