Presentation | 1993/12/17 A Soft Core Processor for Hardware/Software Co-design Shuich Nakamura, Hiroto Yasuura, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We proposed a new method for designing an ASIC.with Soft-Core Processor.In our method,it is able to decide system specification based on a core processor and basic soft-ware,and then to change boundary between bardware and software,to estimate system performance,to modify basic software according to redesign of bardware,and finally to get an optimal system solution.In this paper,we introduce the concept of Soft-Core Processor,and consider a tools required to this method through an example. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Soft-Core Processor / VLSI / ASIC / Hardware/oftware Co- Design / High-level synthesis |
Paper # | VLD93-95 |
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Committee | VLD |
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Conference Date | 1993/12/17(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | VLSI Design Technologies (VLD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Soft Core Processor for Hardware/Software Co-design |
Sub Title (in English) | |
Keyword(1) | Soft-Core Processor |
Keyword(2) | VLSI |
Keyword(3) | ASIC |
Keyword(4) | Hardware/oftware Co- Design |
Keyword(5) | High-level synthesis |
1st Author's Name | Shuich Nakamura |
1st Author's Affiliation | Department of Information Systems,Interdisciplinary Graduate School of Engineering Sciences,Kyushu University() |
2nd Author's Name | Hiroto Yasuura |
2nd Author's Affiliation | Department of Information Systems,Interdisciplinary Graduate School of Engineering Sciences,Kyushu University |
Date | 1993/12/17 |
Paper # | VLD93-95 |
Volume (vol) | vol.93 |
Number (no) | 392 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |