| Presentation | 1996/10/17 An Architecture of FPGA based Multi-Chip Modules Targeted to Rapid Prototype Systems for Telecommunications Masaru Katayama, Takahiro Murooka, Toshiaki Miyazaki, Kazuhiro Shirakawa, Kazuhiro Hayashi, Takaki Ichimori, Kennosuke Fukami, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We developed an FPGA based multi-chip module whose component is the telecommunication-oriented FPGA, called PROTEUS. This module consists of 3×3 PROTEUS's and its size is 114mm square. Each PROTEUS chip is mounted on the MCM substrate using Tape Automated Bonding (TAB) technology, in order to minimize the size of MCM. To integrate 996 I/O pins, we use stack connectors, so, it is easy to mount it on a circuit board. The delay time between the neighbor FPGAs on the MCM is 200psec, and it is possible to implement large scale circuits in the MCM. We also developed a rapid prototype system that has several MCMs, and realized real-time telecommunication circuits in the system. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FPGA / MCM / TAB / ATM / Telecommunication |
| Paper # | VLD96-54 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 1996/10/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Architecture of FPGA based Multi-Chip Modules Targeted to Rapid Prototype Systems for Telecommunications |
| Sub Title (in English) | |
| Keyword(1) | FPGA |
| Keyword(2) | MCM |
| Keyword(3) | TAB |
| Keyword(4) | ATM |
| Keyword(5) | Telecommunication |
| 1st Author's Name | Masaru Katayama |
| 1st Author's Affiliation | NTT System Electronics Laboratories() |
| 2nd Author's Name | Takahiro Murooka |
| 2nd Author's Affiliation | NTT System Electronics Laboratories |
| 3rd Author's Name | Toshiaki Miyazaki |
| 3rd Author's Affiliation | NTT System Electronics Laboratories |
| 4th Author's Name | Kazuhiro Shirakawa |
| 4th Author's Affiliation | NTT Optical Network Systems Laboratories |
| 5th Author's Name | Kazuhiro Hayashi |
| 5th Author's Affiliation | NTT Optical Network Systems Laboratories |
| 6th Author's Name | Takaki Ichimori |
| 6th Author's Affiliation | NTT Network Service Systems Laboratories |
| 7th Author's Name | Kennosuke Fukami |
| 7th Author's Affiliation | NTT Science and Core Technology Laboratory Group |
| Date | 1996/10/17 |
| Paper # | VLD96-54 |
| Volume (vol) | vol.96 |
| Number (no) | 298 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |