Presentation	1997/3/6 On Bottom-up Algorithms for Bi-decomposition of Logic Functions Yusuke Matsunaga,
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Abstract(in English)	If a logic function f(X) is represented as f(X)=h(g_1(X_1),g_2(X_2)) where (h(y_1,y_2) is an arbitrary 2-input logic function, f is called to have a bi-decomposition. Furthermore, if two functions g_1 and g_2 are independent (i.e. X_1∩X_2=φ), f is called to have a disjoint bi-decomposition. In this paper, an efficient algorithm finding such decompositions is presented. Also, a novel data structure, called Factored BDD(Binary Decision Diagram) is introduced to represent such decompositions. The proposed algorithm can find disjoint bi-decompositions with CPU time proportional to the size of the BDD.
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Keyword(in English)	logic synthesis / function decomposition / binary decision diagrams
Paper #	VLD96-90,ICD96-200
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Conference Information
Committee	VLD
Conference Date	1997/3/6(1days)
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Paper Information
Registration To	VLSI Design Technologies (VLD)
Language	JPN
Title (in Japanese)	(See Japanese page)
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Title (in English)	On Bottom-up Algorithms for Bi-decomposition of Logic Functions
Sub Title (in English)
Keyword(1)	logic synthesis
Keyword(2)	function decomposition
Keyword(3)	binary decision diagrams
1st Author's Name	Yusuke Matsunaga
1st Author's Affiliation	Fujitsu Laboratories LTD.()
Date	1997/3/6
Paper #	VLD96-90,ICD96-200
Volume (vol)	vol.96
Number (no)	555
Page	pp.pp.-
#Pages	8
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