Presentation | 2001/3/23 Packing Based 3D Scheduling for Dynamically Reconfigurable Systems Jun'ichi Yokoyama, Mineo Kaneko, Satoshi Tayu, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Dynamic reconfiguration is an attractive technology for its computation speed comparable to that of custom hardware and its flexibility comparable to that of a general purpose computer. In this paper, scheduling data flow graphs onto dynamically and partly reconfigurable devices is treated. Since the spatial and temporal region occupied by each reconfigured module forms a cube, there are much similarities between the scheduling on dynamically and partly reconfigurable devices and packing cubes into 3D space. Based on this observation, we propose a coding scheme, constrained sequence quintuple, which represents both temporal scheduling of module reconfigurations and task executions, and spatial placement of reconfigured modules by five permutations of module (or task) names. Exploration of the solution space constructed by our constrained sequence quintuple by Simhlated Annealing is demonstrated using 5th order elliptic filter example. The experimental results show us higher potential of dynamically/partly reconfiguration not only in its flexibility but also in reducing wire length and congestion. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Scheduling / dynamic reconfiguration / packing / permutation of names / precedence relation / FPGA |
Paper # | CAS2000-133,DSP2000-191,CS2000-153 |
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Committee | CS |
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Conference Date | 2001/3/23(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Communication Systems (CS) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Packing Based 3D Scheduling for Dynamically Reconfigurable Systems |
Sub Title (in English) | |
Keyword(1) | Scheduling |
Keyword(2) | dynamic reconfiguration |
Keyword(3) | packing |
Keyword(4) | permutation of names |
Keyword(5) | precedence relation |
Keyword(6) | FPGA |
1st Author's Name | Jun'ichi Yokoyama |
1st Author's Affiliation | Japan Advanced Institute of Science and Technology() |
2nd Author's Name | Mineo Kaneko |
2nd Author's Affiliation | Japan Advanced Institute of Science and Technology |
3rd Author's Name | Satoshi Tayu |
3rd Author's Affiliation | Japan Advanced Institute of Science and Technology |
Date | 2001/3/23 |
Paper # | CAS2000-133,DSP2000-191,CS2000-153 |
Volume (vol) | vol.100 |
Number (no) | 722 |
Page | pp.pp.- |
#Pages | 8 |
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