| Presentation | 2001/3/23 A Hardware Implementation of Genetic Algorithm for Extraction of Disconnected Closed Loops Using FPGAs Ryoichi KOBAYASHI, Masahide ABE, Masayuki KAWAMATA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper proposes the Genetic Algorithm Processor (GAP) specified for the disconnected closed-loop extraction problem, and evaluates its performance. This extraction problem is one of the typical GA applications in which the fitness evaluation requires considerably computation time and the length of chromosomes is variable. The GAP is suitable for such a GA application. This paper also constitutes the distributed parallel GA that reduces the computation time and improves the performance of a search. Experimental results show that the execution speed of a GAP is more than 350 times faster than the software-based GA. Experimental results also show that the speed of computation is approximately proportional to the number of GAPs. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | extraction of disconnected closed loops / genetic algorithm / FPGA / GA hardware |
| Paper # | CAS2000-131,DSP2000-189,CS2000-151 |
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| Conference Information | |
| Committee | CS |
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| Conference Date | 2001/3/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Communication Systems (CS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Hardware Implementation of Genetic Algorithm for Extraction of Disconnected Closed Loops Using FPGAs |
| Sub Title (in English) | |
| Keyword(1) | extraction of disconnected closed loops |
| Keyword(2) | genetic algorithm |
| Keyword(3) | FPGA |
| Keyword(4) | GA hardware |
| 1st Author's Name | Ryoichi KOBAYASHI |
| 1st Author's Affiliation | Department of Electronic Engineering, Graduate School of Engineering, Tohoku University() |
| 2nd Author's Name | Masahide ABE |
| 2nd Author's Affiliation | Department of Electronic Engineering, Graduate School of Engineering, Tohoku University |
| 3rd Author's Name | Masayuki KAWAMATA |
| 3rd Author's Affiliation | Department of Electronic Engineering, Graduate School of Engineering, Tohoku University |
| Date | 2001/3/23 |
| Paper # | CAS2000-131,DSP2000-189,CS2000-151 |
| Volume (vol) | vol.100 |
| Number (no) | 722 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |