| Presentation | 1997/1/31 Construction of Decorder of 3-Dimenshional Ring Code Akitoshi ANDO, Masanao TAGUCHI, Eisaku YAMAGUCHI, Ichi TAKUMI, Masayasu HATA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | 3-dimensional Ring Code has a good ability which works under bad channel condition. In this paper, we propose a construction of decorder of 3-dimensional Ring Code. We have used "parity check lines" as a method of correcting errors. But when we implement 3-dimensional Ring Code by this method, the decoding speed gets down by reason that number of accesses to the Ring Code increase. Then we introduce "syndrome plains" to the decorder of high throughput error correction. The decorder is described by Hardware Description Language and is implemented by FPGA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | 3-dimensional Ring Code / decorder / high bit error rate |
| Paper # | CS96-144 |
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| Conference Information | |
| Committee | CS |
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| Conference Date | 1997/1/31(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Communication Systems (CS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Construction of Decorder of 3-Dimenshional Ring Code |
| Sub Title (in English) | |
| Keyword(1) | 3-dimensional Ring Code |
| Keyword(2) | decorder |
| Keyword(3) | high bit error rate |
| 1st Author's Name | Akitoshi ANDO |
| 1st Author's Affiliation | Nagoya Institute of Technology() |
| 2nd Author's Name | Masanao TAGUCHI |
| 2nd Author's Affiliation | Nagoya Institute of Technology |
| 3rd Author's Name | Eisaku YAMAGUCHI |
| 3rd Author's Affiliation | Nagoya Institute of Technology |
| 4th Author's Name | Ichi TAKUMI |
| 4th Author's Affiliation | Nagoya Institute of Technology |
| 5th Author's Name | Masayasu HATA |
| 5th Author's Affiliation | Nagoya Institute of Technology |
| Date | 1997/1/31 |
| Paper # | CS96-144 |
| Volume (vol) | vol.96 |
| Number (no) | 505 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |