Presentation 1998/3/5
Loop Oriented Scheduling Method for Multi-microprocessor Networks
Akihiro Nishi, Hiroaki Ishii, Hideto Nishikado, Hironori Yamauchi,
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Abstract(in English) According to the increasing capability of VLSI technologies, any types of on chip parallel processing systems formed with several tens of microprocessors are becoming more practical.Software technologies such as parallel compiling or task scheduling, however, do not go with the above hardware progress, which means that the scheduling is a dominant bottle neck so as applying the multi-microprocessor systems to the practical signal processing systems. In thispaper, we propose a translation method so that the original programs can be translated into concurrently executable forms.From some experiments using FFT programs, we have confirmed usefulness and effectivity of the method.
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Keyword(in English) microprocessor / parallel processing / scheduling / signal processing / soft hard codesign / concurrent programming
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Committee CS
Conference Date 1998/3/5(1days)
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Language JPN
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Title (in English) Loop Oriented Scheduling Method for Multi-microprocessor Networks
Sub Title (in English)
Keyword(1) microprocessor
Keyword(2) parallel processing
Keyword(3) scheduling
Keyword(4) signal processing
Keyword(5) soft hard codesign
Keyword(6) concurrent programming
1st Author's Name Akihiro Nishi
1st Author's Affiliation Department of Electrical Engineering, Ritsumeikan University()
2nd Author's Name Hiroaki Ishii
2nd Author's Affiliation Department of Electrical Engineering, Ritsumeikan University
3rd Author's Name Hideto Nishikado
3rd Author's Affiliation Department of Electrical Engineering, Ritsumeikan University
4th Author's Name Hironori Yamauchi
4th Author's Affiliation Department of Electrical Engineering, Ritsumeikan University
Date 1998/3/5
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Volume (vol) vol.97
Number (no) 584
Page pp.pp.-
#Pages 8
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