Presentation 2002/8/27
An Efficient Algorithm for Finding All DC Solutions of Piecewise-Linear Circuits
Kiyotaka YAMAMURA, Masaki SATO,
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Abstract(in English) An efficient algorithm is proposed for finding all dc solutions of piecewise-linear (PWL) circuits. This algorithm is based on a. powerful test (termed the LP test) for nonexistence of a solution to a system of PWL equations in a given region using the dual simplex method. The proposed algorithm also uses a special technique that decreases the number of regions on which the LP test is performed. By numerical examples. it is shown that the proposed algorithm could find all solutions of large scale problems, including those where the number of variables is 500 and the number of linear regions is 10^<500>, in practical computation time.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) circuit simulation / dc analysis / finding all solutions / piecewise-linear circuit
Paper # NLP2002-44
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Committee NLP
Conference Date 2002/8/27(1days)
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Paper Information
Registration To Nonlinear Problems (NLP)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An Efficient Algorithm for Finding All DC Solutions of Piecewise-Linear Circuits
Sub Title (in English)
Keyword(1) circuit simulation
Keyword(2) dc analysis
Keyword(3) finding all solutions
Keyword(4) piecewise-linear circuit
1st Author's Name Kiyotaka YAMAMURA
1st Author's Affiliation Department of Electrical, Electronic, and Communication Engineering, Chuo University()
2nd Author's Name Masaki SATO
2nd Author's Affiliation Department of Electrical, Electronic, and Communication Engineering, Chuo University
Date 2002/8/27
Paper # NLP2002-44
Volume (vol) vol.102
Number (no) 297
Page pp.pp.-
#Pages 6
Date of Issue