| Presentation | 2000/12/14 Analog IC Design, Implementation and Measurements of Neural Networks Yoshina TODO, Tsutomu TAKASAKI, Masahiro YOSHIDA, Teru YONEYAMA, Hideki ASAI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this report, we describe the design and results obtained from the measurements of neuro-chips, working in analog domain, which has the multi-layer feedforward network structure. Furthermore, we propose the back-propagation system with neuro-chips, which uses the output of neuro-chips. As a result, we can get the most suitable synaptic weights. As an example, 4-2-4 three-layer neural network which is composed of 422 MOS transistors is designed, tested and measured. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Analog LSI / Multi-Layered Neural Network / Back-Propagation / Design and Measurement |
| Paper # | NLP2000-117 |
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| Conference Information | |
| Committee | NLP |
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| Conference Date | 2000/12/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Nonlinear Problems (NLP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Analog IC Design, Implementation and Measurements of Neural Networks |
| Sub Title (in English) | |
| Keyword(1) | Analog LSI |
| Keyword(2) | Multi-Layered Neural Network |
| Keyword(3) | Back-Propagation |
| Keyword(4) | Design and Measurement |
| 1st Author's Name | Yoshina TODO |
| 1st Author's Affiliation | SYSTEC Corporation() |
| 2nd Author's Name | Tsutomu TAKASAKI |
| 2nd Author's Affiliation | SYSTEC Corporation |
| 3rd Author's Name | Masahiro YOSHIDA |
| 3rd Author's Affiliation | Department of Systems Engineering, Faculty of Engineering, Shizuoka University |
| 4th Author's Name | Teru YONEYAMA |
| 4th Author's Affiliation | Department of Systems Engineering, Faculty of Engineering, Shizuoka University |
| 5th Author's Name | Hideki ASAI |
| 5th Author's Affiliation | Department of Systems Engineering, Faculty of Engineering, Shizuoka University |
| Date | 2000/12/14 |
| Paper # | NLP2000-117 |
| Volume (vol) | vol.100 |
| Number (no) | 518 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |