| Presentation | 1999/11/5 High speed CMOS majority gates and its application Kousuke Suzuki, Yasuhiro Katayama, Shigeo Sato, Koji Nakajima, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | majority circuit / inverter / CMOS / neuro / median filter / error correction code |
| Paper # | NLP99-114 |
| Date of Issue |
| Conference Information | |
| Committee | NLP |
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| Conference Date | 1999/11/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Nonlinear Problems (NLP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High speed CMOS majority gates and its application |
| Sub Title (in English) | |
| Keyword(1) | majority circuit |
| Keyword(2) | inverter |
| Keyword(3) | CMOS |
| Keyword(4) | neuro |
| Keyword(5) | median filter |
| Keyword(6) | error correction code |
| 1st Author's Name | Kousuke Suzuki |
| 1st Author's Affiliation | Research Institute of Electrical Communication, Tohoku University() |
| 2nd Author's Name | Yasuhiro Katayama |
| 2nd Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
| 3rd Author's Name | Shigeo Sato |
| 3rd Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
| 4th Author's Name | Koji Nakajima |
| 4th Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
| Date | 1999/11/5 |
| Paper # | NLP99-114 |
| Volume (vol) | vol.99 |
| Number (no) | 412 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |