| Presentation | 1999/3/17 Design Method and Analysis of Neural Networks for Limit Cycle Generator Teru YONEYAMA, Hiroshi NINOMIYA, Hideki ASAI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper describes a simple design method of the neural networks for limit cycle generators. In this method, first, the constraint conditions for the synaptic weights, which are given by the linear inequalities, are derived from the dynamics of neural networks. Next, the linear inequalities are solved by the linear programming method. The synaptic weights are determined by the above solutions and the limit cycle generator is designed. We use the steepest descent method for solving the linear programming problems. Furthermore, we have designed the limit cycle generator with analog neural networks and simulated by using SPICE. Finally, we have confirmed that our design method is efficient and practical for the design of limit cycle generators. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | neural networks / limit cycle generator / linear programming / analog electronic circuits. |
| Paper # | NLP98-115 |
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| Conference Information | |
| Committee | NLP |
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| Conference Date | 1999/3/17(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Nonlinear Problems (NLP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design Method and Analysis of Neural Networks for Limit Cycle Generator |
| Sub Title (in English) | |
| Keyword(1) | neural networks |
| Keyword(2) | limit cycle generator |
| Keyword(3) | linear programming |
| Keyword(4) | analog electronic circuits. |
| 1st Author's Name | Teru YONEYAMA |
| 1st Author's Affiliation | Department of Systems Engineering, Faculty of Engineering, Shizuoka University() |
| 2nd Author's Name | Hiroshi NINOMIYA |
| 2nd Author's Affiliation | Department of Information Science, Shonan Institute of Technology |
| 3rd Author's Name | Hideki ASAI |
| 3rd Author's Affiliation | Department of Systems Engineering, Faculty of Engineering, Shizuoka University |
| Date | 1999/3/17 |
| Paper # | NLP98-115 |
| Volume (vol) | vol.98 |
| Number (no) | 662 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |