Presentation | 1996/7/27 Design of 64 bit Discrete Walsh Transform Processor Based on Neural Networks Haruyasu ADACHI, Takeshi KAMIO, Hiroshi NINOMIYA, Hideki ASAI, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Discrete Walsh transform (DWT) is one of the most important techniques in the field of signal processing. We have proposed the 8bit DWT neuro chip based on Hopfield linear programming neural networks. From SPICE simulations, it have been confirmed that our chip keeps the error less than 1% and carries out the DWT within 30 nano-seconds. In this report, we show the design of the 64bit DWT neuro processor, using the 8bit DWT neuro chips as modules. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | neural networks / discrete Walsh transform / orthogonal matrix / modularization / analog design |
Paper # | NLP-96-52 |
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Conference Information | |
Committee | NLP |
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Conference Date | 1996/7/27(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Nonlinear Problems (NLP) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Design of 64 bit Discrete Walsh Transform Processor Based on Neural Networks |
Sub Title (in English) | |
Keyword(1) | neural networks |
Keyword(2) | discrete Walsh transform |
Keyword(3) | orthogonal matrix |
Keyword(4) | modularization |
Keyword(5) | analog design |
1st Author's Name | Haruyasu ADACHI |
1st Author's Affiliation | SANEI HYTECHS Co.,Ltd.() |
2nd Author's Name | Takeshi KAMIO |
2nd Author's Affiliation | Dept. of Syst. Eng., Shizuoka Univ. |
3rd Author's Name | Hiroshi NINOMIYA |
3rd Author's Affiliation | Dept. of Syst. Eng., Shizuoka Univ. |
4th Author's Name | Hideki ASAI |
4th Author's Affiliation | Dept. of Syst. Eng., Shizuoka Univ. |
Date | 1996/7/27 |
Paper # | NLP-96-52 |
Volume (vol) | vol.96 |
Number (no) | 208 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |