Presentation 1997/10/6
Realization of Simple Chaotic Circuits with MOS
Yasuteru HOSOKAWA, Takumi ICHIHARA, Yoshifumi NISHIO, Akio USHIDA,
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Abstract(in English) Recently, analog chaotic circuits are expected to be utilized for various engineering applications. When we put an analog chaotic circuit to practical use, it is necessary to realize it on IC chip. However, almost studies about IC realization of analog chaotic circuits treat only Chua's circuit. In this report, we consider the IC realization of simple analog chaotic circuits family. We construct some analog chaotic circuits in the family and carry out SPICE simulation. We can confirm that the simulated results agree well with the circuit experimental results.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Analog Chaotic Circuits / MOS / OTA / SPICE
Paper # NLP97-85-98
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Committee NLP
Conference Date 1997/10/6(1days)
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Paper Information
Registration To Nonlinear Problems (NLP)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Realization of Simple Chaotic Circuits with MOS
Sub Title (in English)
Keyword(1) Analog Chaotic Circuits
Keyword(2) MOS
Keyword(3) OTA
Keyword(4) SPICE
1st Author's Name Yasuteru HOSOKAWA
1st Author's Affiliation Dept. of Electrical and Electronic Engineering, Tokushima University()
2nd Author's Name Takumi ICHIHARA
2nd Author's Affiliation Dept. of Electrical and Electronic Engineering, Tokushima University
3rd Author's Name Yoshifumi NISHIO
3rd Author's Affiliation Dept. of Electrical and Electronic Engineering, Tokushima University
4th Author's Name Akio USHIDA
4th Author's Affiliation Dept. of Electrical and Electronic Engineering, Tokushima University
Date 1997/10/6
Paper # NLP97-85-98
Volume (vol) vol.97
Number (no) 300
Page pp.pp.-
#Pages 6
Date of Issue