Presentation 1997/11/5
InP heterojunction bippolar transistors for 40Gb/s optical communication ICs
T. Tanoue, H. Suzuki, K. Watanabe, H. Masuda, K. Ouchi,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) A transistor model of InP/InGaAs HBT for circuit simulation has been developed. Self-heating effet and its frequency dependence were formulated and simulation error of less than 10% has been achieved.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Inp HBT / 40Gb/s optical communication / transistor model
Paper # OCS97-73
Date of Issue

Conference Information
Committee OCS
Conference Date 1997/11/5(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Optical Communication Systems (OCS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) InP heterojunction bippolar transistors for 40Gb/s optical communication ICs
Sub Title (in English)
Keyword(1) Inp HBT
Keyword(2) 40Gb/s optical communication
Keyword(3) transistor model
1st Author's Name T. Tanoue
1st Author's Affiliation Hitachi, Ltd., Central Research Laboratory()
2nd Author's Name H. Suzuki
2nd Author's Affiliation Hitachi, Ltd., Central Research Laboratory
3rd Author's Name K. Watanabe
3rd Author's Affiliation Hitachi, Ltd., Central Research Laboratory
4th Author's Name H. Masuda
4th Author's Affiliation Hitachi, Ltd., Central Research Laboratory
5th Author's Name K. Ouchi
5th Author's Affiliation Hitachi, Ltd., Central Research Laboratory
Date 1997/11/5
Paper # OCS97-73
Volume (vol) vol.97
Number (no) 358
Page pp.pp.-
#Pages 6
Date of Issue