Presentation 1998/10/15
A Study on Branch Predictors that Dynamically Reduce Destructive Aliasings
ATSUSHI MORI, RYOTAROU KOBAYASHI, HIDEKI ANDO, TOSHIO SHIMADA,
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Abstract(in English) An accurate branch predictor is essential for modern microprocessors with deep pipeline. In recent study of branch predictors, it is clear that destructive aliasings limit performance of branch predictors. Therefore, reduction of destructive aliasing is required to improve branch prediction accuracy. Existing ways to reduce destructive aliasings were not efficient, because they aimed to reduce all aliasings. We show that improvement of branch prediction accuracy is possible by detecting and avoiding destructive aliasings.
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Keyword(in English) branch prediction / destructive aliasing
Paper # DSP98-93,ICD98-180,CPSY98-95
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Conference Information
Committee DSP
Conference Date 1998/10/15(1days)
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Paper Information
Registration To Digital Signal Processing (DSP)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Study on Branch Predictors that Dynamically Reduce Destructive Aliasings
Sub Title (in English)
Keyword(1) branch prediction
Keyword(2) destructive aliasing
1st Author's Name ATSUSHI MORI
1st Author's Affiliation Graduate School of Engineering, Nagoya University()
2nd Author's Name RYOTAROU KOBAYASHI
2nd Author's Affiliation Graduate School of Engineering, Nagoya University
3rd Author's Name HIDEKI ANDO
3rd Author's Affiliation Graduate School of Engineering, Nagoya University
4th Author's Name TOSHIO SHIMADA
4th Author's Affiliation Graduate School of Engineering, Nagoya University
Date 1998/10/15
Paper # DSP98-93,ICD98-180,CPSY98-95
Volume (vol) vol.98
Number (no) 318
Page pp.pp.-
#Pages 8
Date of Issue