| Presentation | 1995/10/19 Optimal Design of a VLSI Parallel Processor with Minimum Delay Time Masayuki Sasaki, Michitaka Kameyama, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In intelligent integrated systems such as robotics for autonomous work, it is essential to respond to the change of the environment very quickly. Therefore, the development of special-purpose VLSI processors with minimum delay time becomes a very important subject. In order to minimize the delay time, the processing requires a suitable combination of specially parallel and pipeline processing. In order to minimize the delay time, the processing requires a suitable combination of specially parallel and pipeline processing. In this article, we present a scheduling algorithm for high-level synthesis, where the input to the scheduler is a behavioral description viewed as a data flow graph. The scheduler minimizes the delay time under the constraint of a silicon area and I/O pins. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | intelligent integrated systems / high-level synthesis / pipeline / specially parallel processing / minimum delay time / scheduling |
| Paper # | DSP95-102,ICD95-151 |
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| Conference Information | |
| Committee | DSP |
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| Conference Date | 1995/10/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Digital Signal Processing (DSP) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Optimal Design of a VLSI Parallel Processor with Minimum Delay Time |
| Sub Title (in English) | |
| Keyword(1) | intelligent integrated systems |
| Keyword(2) | high-level synthesis |
| Keyword(3) | pipeline |
| Keyword(4) | specially parallel processing |
| Keyword(5) | minimum delay time |
| Keyword(6) | scheduling |
| 1st Author's Name | Masayuki Sasaki |
| 1st Author's Affiliation | Graduate School of Information Sciences, Tohoku University() |
| 2nd Author's Name | Michitaka Kameyama |
| 2nd Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
| Date | 1995/10/19 |
| Paper # | DSP95-102,ICD95-151 |
| Volume (vol) | vol.95 |
| Number (no) | 298 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |