| Presentation | 1995/10/19 A Shared Radix 2 Division and Square Root Unit Using an Asynchronous Circuit G. Matsubara, N. Ide, S. Suzuki, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A shared radix 2 division and square root algorithm based on SRT algorithm has been investigated. The exactly same calculation time for division and square root is achieved by using an on-the-fly digit decoding and an overlapped quotient calculation. The proposed quotient selection logic using a 3-b carry propagation adder can make a quotient selection table symmetric and can solve a problem in a divisible calculation. The execution time of floating point 55-b full mantissa division and square root is expected to be less than 30ns when an asynchronous circuit with 0.3um triple metal CMOS technology is assumed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Division / square root / floating point / SRT / asynchronous circuit / self-timed circuit |
| Paper # | DSP95-101,ICD95-150 |
| Date of Issue |
| Conference Information | |
| Committee | DSP |
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| Conference Date | 1995/10/19(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Digital Signal Processing (DSP) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A Shared Radix 2 Division and Square Root Unit Using an Asynchronous Circuit |
| Sub Title (in English) | |
| Keyword(1) | Division |
| Keyword(2) | square root |
| Keyword(3) | floating point |
| Keyword(4) | SRT |
| Keyword(5) | asynchronous circuit |
| Keyword(6) | self-timed circuit |
| 1st Author's Name | G. Matsubara |
| 1st Author's Affiliation | Research and Development Center, Toshiba Corporation() |
| 2nd Author's Name | N. Ide |
| 2nd Author's Affiliation | Research and Development Center, Toshiba Corporation |
| 3rd Author's Name | S. Suzuki |
| 3rd Author's Affiliation | Research and Development Center, Toshiba Corporation |
| Date | 1995/10/19 |
| Paper # | DSP95-101,ICD95-150 |
| Volume (vol) | vol.95 |
| Number (no) | 298 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |