Presentation 1997/6/27
A performance estimation of the VLIW processor for a multimedia data processing
Kenji Toriumi, Kenji Otani, Kiyoshige Nakamura, Keiichi Sakai, Tadashi Ae,
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Abstract(in English) Massive processor power is required to treat a multimedia data such as moving picture, music, 3-D graphics and etc. in the real time. Therefore, we decrease the load of the host processor and operate in real time by using an application specific processor for the multimedia data. In this report, we propose the VLIW processor for multimedia data processing, and estimate the performance by a simulator for chip design.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Multimedia data / VLIW / Simulator / DCT / FFT / CRC
Paper # CAS97-32
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Conference Information
Committee DSP
Conference Date 1997/6/27(1days)
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Registration To Digital Signal Processing (DSP)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A performance estimation of the VLIW processor for a multimedia data processing
Sub Title (in English)
Keyword(1) Multimedia data
Keyword(2) VLIW
Keyword(3) Simulator
Keyword(4) DCT
Keyword(5) FFT
Keyword(6) CRC
1st Author's Name Kenji Toriumi
1st Author's Affiliation Electrical Engineering, Faculty of Engineering, Hiroshima University()
2nd Author's Name Kenji Otani
2nd Author's Affiliation Electrical Engineering, Faculty of Engineering, Hiroshima University
3rd Author's Name Kiyoshige Nakamura
3rd Author's Affiliation Electrical Engineering, Faculty of Engineering, Hiroshima University
4th Author's Name Keiichi Sakai
4th Author's Affiliation Electrical Engineering, Faculty of Engineering, Hiroshima University
5th Author's Name Tadashi Ae
5th Author's Affiliation Electrical Engineering, Faculty of Engineering, Hiroshima University
Date 1997/6/27
Paper # CAS97-32
Volume (vol) vol.97
Number (no) 141
Page pp.pp.-
#Pages 8
Date of Issue