Presentation 2002/1/23
Hexagonal Quantum BDD Integrated Circuit Utilizing GaAs Schottky Wrap Gate Structures
Seiya KASAI, Miki YUMOTO, Hideki HASEGAWA,
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Abstract(in English) A novel hexagonal quantum BDD integrated circuit technology is described. This circuit is based on a binary decision diagram (BDD) logic architecture and it is implemented by gate-controlled quantum wire and single electron devices arranged on a hexagonal network, which is realized by Schottky wrap gate (WPG) control of GaAs-based hexagonal nanowire networks.Quantum wire and single electron node devices were successfully fabricated and characterized.Then, basic logic circuits including a half adder were realized and their logic operations were confirmed.Feasibility for large scale integration in this new circuit technology was demonstrated by design and fabrication of full adder circuits.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) BDD / Quanturm Device / Integrated Logic Circuit / Hexagonal nanowire network / Schottky Wrap Gate / GaAs
Paper # 2001-ED-246,2001-SDM-249
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Committee ED
Conference Date 2002/1/23(1days)
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Registration To Electron Devices (ED)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Hexagonal Quantum BDD Integrated Circuit Utilizing GaAs Schottky Wrap Gate Structures
Sub Title (in English)
Keyword(1) BDD
Keyword(2) Quanturm Device
Keyword(3) Integrated Logic Circuit
Keyword(4) Hexagonal nanowire network
Keyword(5) Schottky Wrap Gate
Keyword(6) GaAs
1st Author's Name Seiya KASAI
1st Author's Affiliation Research Center for Integrated Quantum Electronics and Graduate School of Electronics and Information Engineering, Hokkaido University()
2nd Author's Name Miki YUMOTO
2nd Author's Affiliation Research Center for Integrated Quantum Electronics and Graduate School of Electronics and Information Engineering, Hokkaido University
3rd Author's Name Hideki HASEGAWA
3rd Author's Affiliation Research Center for Integrated Quantum Electronics and Graduate School of Electronics and Information Engineering, Hokkaido University
Date 2002/1/23
Paper # 2001-ED-246,2001-SDM-249
Volume (vol) vol.101
Number (no) 619
Page pp.pp.-
#Pages 6
Date of Issue