| Presentation | 2001/2/22 Transport characteristics of silicon single-electron transistors with gate oxides formed by LP-CVD Masumi Saitoh, Nobuyoshi Takahashi, Toshiro Hiramoto, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We fabricated silicon point-contact channel MOSFETs with gate oxides formed by LP-CVD and successfully demonstrated Coulomb blockade oscillations at room temperature. In one device, the peak-to-valley current ratio of Coulomb blockade oscillations at room temperature is about 2, and single-electron addition energy is as large as 251 meV. In another device, staircase feature due to discrete quantum levels in a dot is observed at low temperatures. The formation mechanisms of silicon dot and tunnel barriers are not clear at present, calling for further investigation. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | silicon single-electron transistor / Coulomb blockade oscillations / room temperature operation / ultrasmall quantum dot / quantum levels / staircase feature |
| Paper # | ED2000-262,SDM2000-216 |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 2001/2/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Assistant | |
| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Transport characteristics of silicon single-electron transistors with gate oxides formed by LP-CVD |
| Sub Title (in English) | |
| Keyword(1) | silicon single-electron transistor |
| Keyword(2) | Coulomb blockade oscillations |
| Keyword(3) | room temperature operation |
| Keyword(4) | ultrasmall quantum dot |
| Keyword(5) | quantum levels |
| Keyword(6) | staircase feature |
| 1st Author's Name | Masumi Saitoh |
| 1st Author's Affiliation | Institute of Industrial Science, the University of Tokyo() |
| 2nd Author's Name | Nobuyoshi Takahashi |
| 2nd Author's Affiliation | Institute of Industrial Science, the University of Tokyo |
| 3rd Author's Name | Toshiro Hiramoto |
| 3rd Author's Affiliation | Institute of Industrial Science, the University of Tokyo:VLSI Design and Education Center, the University of Tokyo |
| Date | 2001/2/22 |
| Paper # | ED2000-262,SDM2000-216 |
| Volume (vol) | vol.100 |
| Number (no) | 642 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |