| Presentation | 1999/7/22 New SOI CBiCMOS Structure for High Speed Application Yue-Sheng ZHENG, Tanemasa ASANO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A CBiCMOS device has been newly developed. The device consists of bipolar transistors, which amplify MOSFET currents, built-in the drain regions of each MOSFET of the CMOS using the poly-Si diffusion technology. The device has been fabricated using a reverse bonding and etching back technique to form the fully-isolated (SOI), gate-bottom, collector-top structure which facilitates high speed operation. MOSFET's current amplification and inverter operation of the new device have been experimentally verified. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | merged transistor / SOI / BiMOS / wafer bonding / CBiCMOS |
| Paper # | ED99-105 |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 1999/7/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | New SOI CBiCMOS Structure for High Speed Application |
| Sub Title (in English) | |
| Keyword(1) | merged transistor |
| Keyword(2) | SOI |
| Keyword(3) | BiMOS |
| Keyword(4) | wafer bonding |
| Keyword(5) | CBiCMOS |
| 1st Author's Name | Yue-Sheng ZHENG |
| 1st Author's Affiliation | Center for Microelectronic Systems, Kyushu Institute of Technology() |
| 2nd Author's Name | Tanemasa ASANO |
| 2nd Author's Affiliation | Center for Microelectronic Systems, Kyushu Institute of Technology |
| Date | 1999/7/22 |
| Paper # | ED99-105 |
| Volume (vol) | vol.99 |
| Number (no) | 229 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |