| Presentation | 1999/7/22 Uniform and Thermally Stable Co Salicide Formation for Sub-Quarter-micron Dual-Gate CMOS Devices Hirofumi Sumi, Jun Suenaga, Yutaka Okamoto, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The salicide module process was improved in order to obtain low uniform sheet resistance in narrow regions of a gate area with high concentration of N^+ or P^+ -type dopant. For dual-gate CMOS application, a low depletion condition of the gate electrode is necessary by the high content of the dopant. However, it is impossible to uniformly reduce the sheet resistance of 71 salicide as well as of Co salicide in the gate. We considered the mechanism of the formation of salicide with low sheet resistance under the condition of a high concentration of doped arsenic. Applying the salicide process with an optimized pretreatment method, low sheet resistance and low depletion condition of the gate were obtained. With a Co/Ti capping process (Ti as a capping layer), thermal stability of the Co salicide (850℃) and low junction leakage currents were obtained. The optimized Co salicide module process is applicable to dual-gate CMOS. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CoSi_2 / Co/Ti / TiSi_2 / Sheet resistance / Depletion condition / Pretreatment |
| Paper # | ED99-98 |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 1999/7/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Uniform and Thermally Stable Co Salicide Formation for Sub-Quarter-micron Dual-Gate CMOS Devices |
| Sub Title (in English) | |
| Keyword(1) | CoSi_2 |
| Keyword(2) | Co/Ti |
| Keyword(3) | TiSi_2 |
| Keyword(4) | Sheet resistance |
| Keyword(5) | Depletion condition |
| Keyword(6) | Pretreatment |
| 1st Author's Name | Hirofumi Sumi |
| 1st Author's Affiliation | CCD Busi. Dept., CCD System Division, SC., Core Technol. & Network Company, Sony Corporation() |
| 2nd Author's Name | Jun Suenaga |
| 2nd Author's Affiliation | Process Development Dept., SC., Core Technol. & Network Company, Sony Corporation |
| 3rd Author's Name | Yutaka Okamoto |
| 3rd Author's Affiliation | Process Development Dept., SC., Core Technol. & Network Company, Sony Corporation |
| Date | 1999/7/22 |
| Paper # | ED99-98 |
| Volume (vol) | vol.99 |
| Number (no) | 229 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |