Presentation | 1999/7/22 Hybrid Simulation for IP-Based Design Young-ran Ma, Kiyoung Choi, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | We propose a hybrid simulation method that combines cycle-based and event-driven simulation for the verification of IP-based designs. Cycle-based simulation is applied to the internal circuits of IP blocks that are synchronized with the global clock to obtain high simulation speed, while event-driven simulation is applied to the interface between IP blocks to evaluate the asynchronous timing information of the circuits. And we proposed a new method of caching and function inlining to improve the performance of the cycle-based simulator. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Hybrid simulation / cycle-based simulation / event-driven simulation / caching / function inlining |
Paper # | ED99-86 |
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Conference Information | |
Committee | ED |
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Conference Date | 1999/7/22(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
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Assistant |
Paper Information | |
Registration To | Electron Devices (ED) |
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Language | ENG |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Hybrid Simulation for IP-Based Design |
Sub Title (in English) | |
Keyword(1) | Hybrid simulation |
Keyword(2) | cycle-based simulation |
Keyword(3) | event-driven simulation |
Keyword(4) | caching |
Keyword(5) | function inlining |
1st Author's Name | Young-ran Ma |
1st Author's Affiliation | School of Electrical Engineering, Seoul National University() |
2nd Author's Name | Kiyoung Choi |
2nd Author's Affiliation | School of Electrical Engineering, Seoul National University |
Date | 1999/7/22 |
Paper # | ED99-86 |
Volume (vol) | vol.99 |
Number (no) | 229 |
Page | pp.pp.- |
#Pages | 5 |
Date of Issue |