| Presentation | 1999/6/25 Ultra-thin-film CMOS/SIMOX device technology for low power LSIs Yasuhiro Sato, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | CMOS/SOL (Silicon on Insulator) is very promising for the component of low power LSIs. Fully depleted devices have an ideal subthreshold slope, and thus they can realize the lower power LSIs. The technologies to suppress floating body effects and to reduce source/drain parasitic resistance, both are serious problems in FD devices, are described in this paper. Performance of test LSIs consisting of FD devices are also described. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | SIMOX / SOI / LSI / fully-depleted device / floating body effects / parasitic resistance |
| Paper # | ED99-77 |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 1999/6/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Assistant | |
| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Ultra-thin-film CMOS/SIMOX device technology for low power LSIs |
| Sub Title (in English) | |
| Keyword(1) | SIMOX |
| Keyword(2) | SOI |
| Keyword(3) | LSI |
| Keyword(4) | fully-depleted device |
| Keyword(5) | floating body effects |
| Keyword(6) | parasitic resistance |
| 1st Author's Name | Yasuhiro Sato |
| 1st Author's Affiliation | NTT Telecommunications Energy Laboratories() |
| Date | 1999/6/25 |
| Paper # | ED99-77 |
| Volume (vol) | vol.99 |
| Number (no) | 146 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |