| Presentation | 1999/6/25 Superhigh-Speed / Ultralow-Power Bipolar Device Technology for Bi-CMOS Process Naoki Kotani, Yoshiki Kato, Yoshitaka Yamaguchi, Shinji Nishiura, Takashi Hori, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | SBTI (S__-hrinked B__-ase / T__-rench I__-solation) Bi-CMOS process has been developed to realize superhigh-speed ultralow-power bipolar transistors. This process uses three new technologies, i.e., deep-trench isolation, SIC, and optimized graft base. The minimal NPN bipolar transistor of 0.25×6.75μm^2 emitter size obtained by this process has typical characteristics of hFE=l90, BVceo=4.5V, BVebo=5.0V, and fTmax=20GHz. As its application to integrated circuits, high free-run frequency (2.2GHz) has been achieved at 50μA prescaler dissipation crrent, and the large improvement of active area has been realized. The dissipation current is reduced to one fourth of that in the former-generation process, which corresponds to two-generation imporvement. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Bi-CMOS / Lowpower-dissipation / Prescaler |
| Paper # | ED99-76 |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 1999/6/25(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Superhigh-Speed / Ultralow-Power Bipolar Device Technology for Bi-CMOS Process |
| Sub Title (in English) | |
| Keyword(1) | Bi-CMOS |
| Keyword(2) | Lowpower-dissipation |
| Keyword(3) | Prescaler |
| 1st Author's Name | Naoki Kotani |
| 1st Author's Affiliation | ULSI Process Technology Development Center, Semiconductor Campany Matsushita Electronics Corporation() |
| 2nd Author's Name | Yoshiki Kato |
| 2nd Author's Affiliation | IC Div. Semiconductor Campany Matsushita Electronics Corporation |
| 3rd Author's Name | Yoshitaka Yamaguchi |
| 3rd Author's Affiliation | IC Div. Semiconductor Campany Matsushita Electronics Corporation |
| 4th Author's Name | Shinji Nishiura |
| 4th Author's Affiliation | IC Div. Semiconductor Campany Matsushita Electronics Corporation |
| 5th Author's Name | Takashi Hori |
| 5th Author's Affiliation | ULSI Process Technology Development Center, Semiconductor Campany Matsushita Electronics Corporation |
| Date | 1999/6/25 |
| Paper # | ED99-76 |
| Volume (vol) | vol.99 |
| Number (no) | 146 |
| Page | pp.pp.- |
| #Pages | 8 |
| Date of Issue | |