Presentation	1999/6/25 A 1.0ns Access 770MHz 36Kb SRAM Macro Katsuya Yoshida, Toshiyuki Uetake, Yasuhiko Maki, Takako Nakadai, Masato Susuki, Ryota Nanjo,
PDF Download Page	PDF download Page Link
Abstract(in Japanese)	(See Japanese page)
Abstract(in English)	A 1.0ns access 770MHz 36Kb SRAM macro using a 0.18um CMOS low cost ASIC technology was developed. Key technologies used to achieve this high performance are full dynamic fast word driver circuits, "Noise Free" bit line load circuits and high speed sense amplifier circuits. The word-bit size up to 2Kword x 72bit can be generated automatically by using a compiler.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	0.18μm CMOS / SRAM / 1.0ns access / 770MHZ
Paper #	ED99-71
Date of Issue

Conference Information
Committee	ED
Conference Date	1999/6/25(1days)
Place (in Japanese)	(See Japanese page)
Place (in English)
Topics (in Japanese)	(See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To	Electron Devices (ED)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	A 1.0ns Access 770MHz 36Kb SRAM Macro
Sub Title (in English)
Keyword(1)	0.18μm CMOS
Keyword(2)	SRAM
Keyword(3)	1.0ns access
Keyword(4)	770MHZ
1st Author's Name	Katsuya Yoshida
1st Author's Affiliation	Advanced CMOS Technology Dept., Fujitsu Ltd.()
2nd Author's Name	Toshiyuki Uetake
2nd Author's Affiliation	Advanced CMOS Technology Dept., Fujitsu Ltd.
3rd Author's Name	Yasuhiko Maki
3rd Author's Affiliation	Advanced CMOS Technology Dept., Fujitsu Ltd.
4th Author's Name	Takako Nakadai
4th Author's Affiliation	Advanced CMOS Technology Dept., Fujitsu Ltd.
5th Author's Name	Masato Susuki
5th Author's Affiliation	Advanced CMOS Technology Dept., Fujitsu Ltd.
6th Author's Name	Ryota Nanjo
6th Author's Affiliation	Technology Development Div., Fujitsu Ltd.
Date	1999/6/25
Paper #	ED99-71
Volume (vol)	vol.99
Number (no)	146
Page	pp.pp.-
#Pages	6
Date of Issue