Presentation 1999/6/25
On Board Interconnect Test Technology Suitable for Standard Memory Devices
Shinichiro Ikeda, Yoshiharu Kato,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper proposes "Static Component Interconnect Test Technology (SCITT)" which was joint-developed by Fujitsu and Philips Research Laboratory Co. Netherlands. SCITT is one of electric interconnection test technologies of LSI mounted on a printed board; said LSI is equipped with special test circuitry. SCITT is especially suitable for the "complex" memory device which is not easy to access, for instance Synchronous DRAM, Flash Memory, or Direct Rambus DRAM, ets. It can make the memory-interconnection test easy and hi-speed. Moreover, SCITT has a superior advantage to Boundary-Scan which is another similar interconnection test technology. We don't need to add either special terminal to the LSI or special wiring on the board. The special circuitry on the LSI can be built with simple logic with few die size penalties.
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Keyword(in English) memory / printed board / interconnet test / test time
Paper # ED99-68
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Committee ED
Conference Date 1999/6/25(1days)
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Paper Information
Registration To Electron Devices (ED)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) On Board Interconnect Test Technology Suitable for Standard Memory Devices
Sub Title (in English)
Keyword(1) memory
Keyword(2) printed board
Keyword(3) interconnet test
Keyword(4) test time
1st Author's Name Shinichiro Ikeda
1st Author's Affiliation Fujitsu VLSI Limited()
2nd Author's Name Yoshiharu Kato
2nd Author's Affiliation Fujitsu VLSI Limited
Date 1999/6/25
Paper # ED99-68
Volume (vol) vol.99
Number (no) 146
Page pp.pp.-
#Pages 8
Date of Issue