Presentation 1994/9/14
Prediction of high-speed bipolar transistor properties by process and device Simulaton
Kishiko Maruyama, Yoichi Tamaki, Hisako Sato, Hiroo Masuda, Hitoshi Matsuo, Sigeo Ihara, Toru Toyabe,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) An efficient design methodology for high-speed bipolar transistors has been developed using process and device simulation, taking into account defect induced transient enhanced and a more accurate polysilicon emitter model.The enhancement factor of transient diffusion was extracted from measurements for preceise prediction of the impurity profile,and a new model for interfacial oxide was developed for the polysilicon emitter.As a result, prediction errors of current gain h_FE> and cut-off frequency f_T were reduced to less than 10%.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) process simulation / device simulation / bipolar transistor / transient enhanced diffusion / polysilicon emitter / interfacial oxide
Paper # ED94-57,SDM94-94,VLD94-54
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Committee ED
Conference Date 1994/9/14(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Prediction of high-speed bipolar transistor properties by process and device Simulaton
Sub Title (in English)
Keyword(1) process simulation
Keyword(2) device simulation
Keyword(3) bipolar transistor
Keyword(4) transient enhanced diffusion
Keyword(5) polysilicon emitter
Keyword(6) interfacial oxide
1st Author's Name Kishiko Maruyama
1st Author's Affiliation Central Research Laboratory,Hitachi,Ltd.()
2nd Author's Name Yoichi Tamaki
2nd Author's Affiliation Device Development Center,Hitachi,Ltd.
3rd Author's Name Hisako Sato
3rd Author's Affiliation Device Development Center,Hitachi,Ltd.
4th Author's Name Hiroo Masuda
4th Author's Affiliation Device Development Center,Hitachi,Ltd.
5th Author's Name Hitoshi Matsuo
5th Author's Affiliation Central Research Laboratory,Hitachi,Ltd.
6th Author's Name Sigeo Ihara
6th Author's Affiliation Central Research Laboratory,Hitachi,Ltd.
7th Author's Name Toru Toyabe
7th Author's Affiliation Department of Information and Computer Sciences,Faculty of Engineering,Toyo University
Date 1994/9/14
Paper # ED94-57,SDM94-94,VLD94-54
Volume (vol) vol.94
Number (no) 231
Page pp.pp.-
#Pages 8
Date of Issue