| Presentation | 1999/1/22 Low Volatge Operation Power Heterojunction FET with Low on-resistance for Personal Digital Cellular Phones Takehiko Kato, Yasunori Bito, Naotaka Iwata, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper describes excellent 1.0V operatiion power performance of a double doped AlGaAs/InGaAs/AlGaAs heterojunction FET(HJFET)for Personal Digital Cellular Phones. A low on-resistance of a power FET is key issue for a high output power and a high efficiency. The developed FET with a multilayer cap consisting of a highly Si-doped AlGaAs and narrow recessed structure exhibited an on-resistance of 1.3Ω・mm and a maximum drain current of 620mA/mm. A 28mm gate-periphery device operating with a drain bias voltage of 1.0V demonstrated an output power of 1.0W, an associated gain of 13.7dB and a power-added efficiency of 59% with an adjacent channel leakage power at 50kHz off-center frequency of -48dBc. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | mobile communication handset / power device / on-resistance / low voltage operation / Heterojunction FEt |
| Paper # | ED98-215,MW98-178,ICD98-282 |
| Date of Issue |
| Conference Information | |
| Committee | ED |
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| Conference Date | 1999/1/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Low Volatge Operation Power Heterojunction FET with Low on-resistance for Personal Digital Cellular Phones |
| Sub Title (in English) | |
| Keyword(1) | mobile communication handset |
| Keyword(2) | power device |
| Keyword(3) | on-resistance |
| Keyword(4) | low voltage operation |
| Keyword(5) | Heterojunction FEt |
| 1st Author's Name | Takehiko Kato |
| 1st Author's Affiliation | Kansai Electronics Research Laboratories, NEC Corporation() |
| 2nd Author's Name | Yasunori Bito |
| 2nd Author's Affiliation | Kansai Electronics Research Laboratories, NEC Corporation |
| 3rd Author's Name | Naotaka Iwata |
| 3rd Author's Affiliation | Kansai Electronics Research Laboratories, NEC Corporation |
| Date | 1999/1/22 |
| Paper # | ED98-215,MW98-178,ICD98-282 |
| Volume (vol) | vol.98 |
| Number (no) | 519 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |