Presentation | 1993/9/17 Analysis of Propagation Delay Time for Double-gate SOI-MOSFETs Based on a Scaling Theory Yoshiharu Tosaka, Kunihiro Suzuki, Toshihiro Sugii, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Using our scaling theory we estimated propagation delay time(t_ pd>)for scaled down doublegate(DG)SOI-MOSFETs with an ideal subthreshold factor.We implemented a mobility model,which we derived to agree with experimental data for DGSOI-MOSFETs,on a mixed-level device-circuit simulator and estimated t_pd>.The estimated t_pd> values of 6.2 ps for L_G = O.1μm and 3.4 ps for 0 .05μm show that DGSOI-MOSFETs overcome the scaling limits of bulk MOSFETs and display superb device performance. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | double-gate SOI / scaling theory / mobility model / mixed-level device-circuit simulator / propagation delay time |
Paper # | ED93-86,SDM93-100,VLD93-41 |
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Conference Information | |
Committee | ED |
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Conference Date | 1993/9/17(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Electron Devices (ED) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Analysis of Propagation Delay Time for Double-gate SOI-MOSFETs Based on a Scaling Theory |
Sub Title (in English) | |
Keyword(1) | double-gate SOI |
Keyword(2) | scaling theory |
Keyword(3) | mobility model |
Keyword(4) | mixed-level device-circuit simulator |
Keyword(5) | propagation delay time |
1st Author's Name | Yoshiharu Tosaka |
1st Author's Affiliation | Fujitsu Laboratories Ltd.() |
2nd Author's Name | Kunihiro Suzuki |
2nd Author's Affiliation | Fujitsu Laboratories Ltd. |
3rd Author's Name | Toshihiro Sugii |
3rd Author's Affiliation | Fujitsu Laboratories Ltd. |
Date | 1993/9/17 |
Paper # | ED93-86,SDM93-100,VLD93-41 |
Volume (vol) | vol.93 |
Number (no) | 217 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |