| Presentation | 1995/6/22 A 50% Active Power Saving Circuit without Speed Degradation (Invited) Tadahiro Kuroda, Katsuhiko Seta, Hiroyuki Hara, Masakazu Kakumu, Takayasu Sakurai, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A standby power reduction (SPR) scheme is presented where a substrate bias is applied in a standby mode to increase the threshold voltage. While in an active mode, a substrate bias is not applied which assures high-speed operation. An SPR circuit is proposed and designed using 0.3μm CMOS technology. By lowering the supply voltage and the threshold voltage at the same time, 50% active power reduction is achieved while maintaining the speed and the standby power. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | CMOS / low-power dissipation / low-voltage / low-threshold / substrate bias |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 1995/6/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 50% Active Power Saving Circuit without Speed Degradation (Invited) |
| Sub Title (in English) | |
| Keyword(1) | CMOS |
| Keyword(2) | low-power dissipation |
| Keyword(3) | low-voltage |
| Keyword(4) | low-threshold |
| Keyword(5) | substrate bias |
| 1st Author's Name | Tadahiro Kuroda |
| 1st Author's Affiliation | Toshiba Corp. Semiconductor Device Engineering Lab.() |
| 2nd Author's Name | Katsuhiko Seta |
| 2nd Author's Affiliation | Toshiba Corp. Semiconductor Device Engineering Lab. |
| 3rd Author's Name | Hiroyuki Hara |
| 3rd Author's Affiliation | Toshiba Corp. Semiconductor Device Engineering Lab. |
| 4th Author's Name | Masakazu Kakumu |
| 4th Author's Affiliation | Toshiba Corp. Semiconductor Device Engineering Lab. |
| 5th Author's Name | Takayasu Sakurai |
| 5th Author's Affiliation | Toshiba Corp. Semiconductor Device Engineering Lab. |
| Date | 1995/6/22 |
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| Volume (vol) | vol.95 |
| Number (no) | 116 |
| Page | pp.pp.- |
| #Pages | 7 |
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