Presentation 1998/12/10
Noise Simulation of Digital Printed Circuit Board
Yuuichiro Yoshida, Yasumasa Kondo, Satoshi Mizoguchi,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) Recent electronic products become much smaller with higher density and clock speed. As a result, numerical simulations of transmission lines and electromagnetic interference become necessary. This paper describes recent simulation techniques of transmission line and EMI simulatiom. Though transistor models and IBIS models are common as I/O buffer models for transmission line simulations, ELAJ group proposed the IMIC model as the superior model, 3D EMI simulation give accurate results as analytic solutions for simple structures.Coupling of EMI simulation with circuit simulation and IC/LSI simulation model is necessary in future.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) I/O buffer / IBIS / IMIC / Method of moment / FDTD method
Paper # CPM98-157,ICD98-236
Date of Issue

Conference Information
Committee CPM
Conference Date 1998/12/10(1days)
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Paper Information
Registration To Component Parts and Materials (CPM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Noise Simulation of Digital Printed Circuit Board
Sub Title (in English)
Keyword(1) I/O buffer
Keyword(2) IBIS
Keyword(3) IMIC
Keyword(4) Method of moment
Keyword(5) FDTD method
1st Author's Name Yuuichiro Yoshida
1st Author's Affiliation Toshiba Corporation Information Systems Division()
2nd Author's Name Yasumasa Kondo
2nd Author's Affiliation Toshiba Corporation Information Systems Division
3rd Author's Name Satoshi Mizoguchi
3rd Author's Affiliation Toshiba Corporation Information Systems Division
Date 1998/12/10
Paper # CPM98-157,ICD98-236
Volume (vol) vol.98
Number (no) 456
Page pp.pp.-
#Pages 8
Date of Issue