| Presentation | 1998/12/10 Stacked CSP(Chip Size Package)Technology Kazuya Fujita, Yoshiki Sota, Koji Miyata, Atsuya Narai, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In order to make portable electronic devices more compact and sophisticated, the world's first stacked chip size package has been developed. The device stacks two LSI chips within a CSP. It allows for composite device configurations which can integrate flash memory with static RAM, for example, in the size of a standard CSP. Both the mounting area and the weight of the stacked CSP are about one-third less those of the existing TSOP. Stacked CSP technology has been achieved by optimizing the die-bonding material and the process to permit stacked-chip configurations, and by developing a dualstage wire bonding process which combines ultra-short and ultra-long loops to avoid cross-chip wire short-circuits. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Stacked CSP / CSP / Combination Memory / Stacking Chips / Mounting Area |
| Paper # | CPM98-153,ICD98-232 |
| Date of Issue |
| Conference Information | |
| Committee | CPM |
|---|---|
| Conference Date | 1998/12/10(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Component Parts and Materials (CPM) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Stacked CSP(Chip Size Package)Technology |
| Sub Title (in English) | |
| Keyword(1) | Stacked CSP |
| Keyword(2) | CSP |
| Keyword(3) | Combination Memory |
| Keyword(4) | Stacking Chips |
| Keyword(5) | Mounting Area |
| 1st Author's Name | Kazuya Fujita |
| 1st Author's Affiliation | Packaging Engineering Department, Systems LSI Development Center Integrated Circuits Group, SHARP Corporation() |
| 2nd Author's Name | Yoshiki Sota |
| 2nd Author's Affiliation | Packaging Engineering Department, Systems LSI Development Center Integrated Circuits Group, SHARP Corporation |
| 3rd Author's Name | Koji Miyata |
| 3rd Author's Affiliation | Packaging Engineering Department, Systems LSI Development Center Integrated Circuits Group, SHARP Corporation |
| 4th Author's Name | Atsuya Narai |
| 4th Author's Affiliation | Packaging Engineering Department, Systems LSI Development Center Integrated Circuits Group, SHARP Corporation |
| Date | 1998/12/10 |
| Paper # | CPM98-153,ICD98-232 |
| Volume (vol) | vol.98 |
| Number (no) | 456 |
| Page | pp.pp.- |
| #Pages | 7 |
| Date of Issue | |