| Presentation | 2000/6/16 An Implementation of Lattice Filters using Four Operands Real-Multiply Accumulation Yoshimasa NEGISHI, Eiji WATANABE, Akinori NISHIHARA, Takeshi YANAGISAWA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Four operands Real Multiply Accumulation (4op-RMA) which has been already proposed is the method to implement the transversal circuit, the direct form circuits and the 2D type circuit with real coefficients by using a complex multiplier. This paper reports the enhancement of 4op-RMA for the all-pass lattice circuit. The lattice part can be calculated by a 4op-RMA operation which corresponds to a complex multiplication. In the last part, we also show the implementation becomes easier. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | 4op-RMA / Lattice filter / DSP implementation / Complex multiplication |
| Paper # | CAS2000-32,VLD2000-41,DSP2000-53 |
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| Conference Information | |
| Committee | CAS |
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| Conference Date | 2000/6/16(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Circuits and Systems (CAS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | An Implementation of Lattice Filters using Four Operands Real-Multiply Accumulation |
| Sub Title (in English) | |
| Keyword(1) | 4op-RMA |
| Keyword(2) | Lattice filter |
| Keyword(3) | DSP implementation |
| Keyword(4) | Complex multiplication |
| 1st Author's Name | Yoshimasa NEGISHI |
| 1st Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology() |
| 2nd Author's Name | Eiji WATANABE |
| 2nd Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
| 3rd Author's Name | Akinori NISHIHARA |
| 3rd Author's Affiliation | The Center for Research and Development of Educational Technology, Tokyo Institute of Technology |
| 4th Author's Name | Takeshi YANAGISAWA |
| 4th Author's Affiliation | Faculty of Systems Engineering, Shibaura Institute of Technology |
| Date | 2000/6/16 |
| Paper # | CAS2000-32,VLD2000-41,DSP2000-53 |
| Volume (vol) | vol.100 |
| Number (no) | 119 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |