Presentation 2000/6/16
A Design of Filter Banks on Cyclic LTI Systems
Fumio ITAMI, Eiji WATANABE, Akinori NISHIHARA, Takeshi YANAGISAWA,
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Abstract(in English) Filter banks or FIR filters on cyclic LTI systems can have perfect reconstruction (PR) or allpass property in the case that they can not have on non-cyclic LTI systems. A design method for two channel filter banks on cyclic LTI systems has been proposed recently. It has been shown that two channel linear phase orthogonal filter banks, which can not be realized on non-cyclic LTI systems, can be realized on cyclic LTI systems. This paper proposes a design method for filter banks on cyclic LTI systems, in which modulated filter banks are used. The polyphase representations and PR conditions are presented. A realization method for PR filter banks on cyclic LTI systems is also proposed. We show that PR property can be realized for proposed filter banks on cyclic LTI systems while it can not be realized on non-cyclic systems. Finally, we show a design example of proposed filter banks.
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Keyword(in English) Cyclic LTI Systems / Filter Banks / Digital Signal Processing / Multi-rate Signal Processing
Paper # CAS2000-27,VLD2000-36,DSP2000-48
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Committee CAS
Conference Date 2000/6/16(1days)
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Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
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Title (in English) A Design of Filter Banks on Cyclic LTI Systems
Sub Title (in English)
Keyword(1) Cyclic LTI Systems
Keyword(2) Filter Banks
Keyword(3) Digital Signal Processing
Keyword(4) Multi-rate Signal Processing
1st Author's Name Fumio ITAMI
1st Author's Affiliation Faculty of Systems Engineering, Shibaura Institute of Technology()
2nd Author's Name Eiji WATANABE
2nd Author's Affiliation Faculty of Systems Engineering, Shibaura Institute of Technology
3rd Author's Name Akinori NISHIHARA
3rd Author's Affiliation The Center for Research and Development of Educational Technology, Tokyo Institute of Technology
4th Author's Name Takeshi YANAGISAWA
4th Author's Affiliation Faculty of Systems Engineering, Shibaura Institute of Technology
Date 2000/6/16
Paper # CAS2000-27,VLD2000-36,DSP2000-48
Volume (vol) vol.100
Number (no) 119
Page pp.pp.-
#Pages 8
Date of Issue