Presentation 1999/3/9
Scheduling and Allocation for Bus Power Consumption Reduction
Katsuhito Oohashi, Kazuhito Ito,
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Abstract(in English) In order to charge or discharge capacitance of data buses on LSIs, data communication using data buses consumes electric power. By cutting data buses to the minimum length needed for a particular data communication, the capacitance is minimized and therefore power consumption by driving data busses can be reduced. In this paper we propose an allocation method of elements, such as processing units and registers, by which the total sum of bus lengths needed for data communications is minimized. Data communication between elemenets depends on the assignment of operations to processing units and data intervals to registers, and the assignment depends on the scheduling of operations. We also propose a scheduling method to further minimize the total bus length.
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Keyword(in English) low power / digital signal processing / scheduling / allocation
Paper # CAS98-101
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Committee CAS
Conference Date 1999/3/9(1days)
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Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Scheduling and Allocation for Bus Power Consumption Reduction
Sub Title (in English)
Keyword(1) low power
Keyword(2) digital signal processing
Keyword(3) scheduling
Keyword(4) allocation
1st Author's Name Katsuhito Oohashi
1st Author's Affiliation Department of Electrical and Electronic Systems, Saitama University()
2nd Author's Name Kazuhito Ito
2nd Author's Affiliation Department of Electrical and Electronic Systems, Saitama University
Date 1999/3/9
Paper # CAS98-101
Volume (vol) vol.98
Number (no) 647
Page pp.pp.-
#Pages 8
Date of Issue