Presentation | 1998/6/26 A proposition of the binary pattern recognition algorithm and its digital hardware implementation Yusuke Yokunaga, Takahiro Inoue, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A binary pattern recognition algorithm which can recognize a pattern under the condition that there is no distortion is proposed. The algorithm is based on a matching method using the polar-coordinates system whose origin is set to the centroid of the pattern and high-speed scanning of the centroid of the pattern using the low-resolution image. The proposed algorithm features conpactness and high-speed rocognition. Real-time digital hardware implementation of the proposed algorithm is also presented in this paper. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Pattern recognition / template matching / digital hardware implementation / FPGA |
Paper # | CAS98-18,VLD98-18,DSP98-47 |
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Conference Information | |
Committee | CAS |
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Conference Date | 1998/6/26(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Circuits and Systems (CAS) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A proposition of the binary pattern recognition algorithm and its digital hardware implementation |
Sub Title (in English) | |
Keyword(1) | Pattern recognition |
Keyword(2) | template matching |
Keyword(3) | digital hardware implementation |
Keyword(4) | FPGA |
1st Author's Name | Yusuke Yokunaga |
1st Author's Affiliation | Dept. of Electrical and Computer Engineering, Kumamoto University() |
2nd Author's Name | Takahiro Inoue |
2nd Author's Affiliation | Dept. of Electrical and Computer Engineering, Kumamoto University |
Date | 1998/6/26 |
Paper # | CAS98-18,VLD98-18,DSP98-47 |
Volume (vol) | vol.98 |
Number (no) | 140 |
Page | pp.pp.- |
#Pages | 8 |
Date of Issue |