Presentation 1998/6/25
A Design of a Low-Voltage Current-Mode Integrator Using FG-MOSFET
Takahiro Inoue, Masayoshi Takahashi, Hideo Nakane,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In this paper, a design of a low-voltage current-mode integrator using FG-MOSFETs is proposed. The integrator is composed of two cross-coupled FG-MOSFETs and a voltage-sum amplifier which performes the common-mode input signals. FG-MOSFETs are implemented as subcircuits onto SPICE. and the integrator circuit is simulated using HSPICE. From this simulation. it has been confirmed that the proposed circuit can operate under a sigle 1.5V supply voltage and keeps high common-mode rejection.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Low-Voltage / Current-Mode / Integrator / FG-MOSFET / SPICE
Paper # CAS98-13,VLD98-13,DSP98-42
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Committee CAS
Conference Date 1998/6/25(1days)
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Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Design of a Low-Voltage Current-Mode Integrator Using FG-MOSFET
Sub Title (in English)
Keyword(1) Low-Voltage
Keyword(2) Current-Mode
Keyword(3) Integrator
Keyword(4) FG-MOSFET
Keyword(5) SPICE
1st Author's Name Takahiro Inoue
1st Author's Affiliation Dept. of Electrical and Computer Engineering, Kumamoto University()
2nd Author's Name Masayoshi Takahashi
2nd Author's Affiliation Hitachi
3rd Author's Name Hideo Nakane
3rd Author's Affiliation Dept. of Electrical and Computer Engineering, Kumamoto University
Date 1998/6/25
Paper # CAS98-13,VLD98-13,DSP98-42
Volume (vol) vol.98
Number (no) 139
Page pp.pp.-
#Pages 7
Date of Issue